With the introduction of so-called “deep sub-micron” processes for the manufacturing of devices with a processing unit such as microprocessors or microcontrollers, their susceptibility to spontaneously occurring memory errors (i.e. errors occurring at a random time during the operation) has been increasing. These memory errors may result in that a processing unit utilizing the memory, e.g. a command memory, executes a wrong command.
The principal source of such errors are collapse events taking place in the vicinity of the chips and emitting ionizing α particles. These errors are not permanent, but may be eliminated completely with a writing on the location concerned. They are therefore generally referred to as “soft errors”.
Therefore, protective mechanisms are incorporated with correspondingly manufactured types of devices so as to detect such memory errors. The mechanisms used for the detection of a memory error, e.g. so-called parity encoders, are familiar to a person skilled in the art. Likewise, individual errors can be corrected, e.g. by means of a so-called ECC (ECC=“Error Correction Code”). In so doing, it is desirable to regenerate the memory concerned, i.e. to eliminate the error.
So far, a method has been known for regeneration in which an error is reported to a central processing unit that is superordinate to the subsystem. This causes a reset to be generated which results in a resetting of the entire system concerned and thus in a re-initialization of the memory concerned. This method is very time-consuming (frequently in the range of 1 ms) and will, as a rule, interrupt the regular operation of the program to be processed on the device for such a long time that the affiliated system or the superordinate complete system, respectively, can react with substantial malfunctions. These malfunctions may entail substantial damages, e.g. in the case of failure of a device for controlling the engine of a vehicle, in particular at high speed.